Christian Dufour
Publication date : Nov 2011
Paper File :
IECON2011_real_time_Relultance_Motor_Drives.pdf
Authors
Minh C. Ta, Christian Dufour, Abstract
This paper presents real-time simulation results of a switched reluctance motor (SRM) drive with a novel Torque Distribution Function (TDF) for high-speed applications, in order to reduce torque ripple. The SRM is fed by a three-phase unidirectional power converter having three legs, each of which consist of two IGBTs and two freewheeling diodes. The SRM model incorporates all non linearities between excitation currents, rotor position and flux linkages. For the purpose of control SRM drives, an improvement of the TDF method is proposed for high-speed applications, in order to reduce torque ripple. The real-time simulation of the drive is conducted on the RT-LAB real-time simulation platform. Since the converter is current controlled, the simulator latency is critical to achieving good accuracy and to avoiding current overshoot. The paper demonstrates that this type of drive with simple hysteresis current control can be simulated in real-time at a time-step of 15µs, with good accuracy. The paper also introduces FPGA-based simulation technology required to test advanced algorithms like TDF.
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Publication date : Nov 2011
Paper File :
PCIM Europe 2012 MV drive abstract v3.doc
Authors
Weihua Wang, Jean Bélanger, Christian Dufour, Ata Douzdouzani, Abstract
With increasing complexity of topology and control strategies in medium voltage (MV) drives, a digital hardware-in-loop (HIL) simulator exhibits great advantage over a traditional analog test stand in terms of cost and flexibility. However, a great effort for developing a proper solver, an optimized design of the hardware, firmware and fine-tuning of the model is required to maintain sufficient accuracy of the HIL test stand. This paper presents the novel solver and the system architecture used by the HIL-simulation-based test stand for medium voltage drives. Test results of the ACS 6000 drives are shown under various conditions, and compared with the measurement acquired from the field testing.
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Publication date : Jun 2011
Paper File :
Floating-Point Engines for the FPGA-Based.pdf
Authors
Tarek Ould Bachir, Jean-Pierre David, Jean Mahseredjian, Christian Dufour, Abstract
The real-time simulation of power electronic circuits is challenging for several reasons. A PC-based simulation can hardly achieve time-steps below 5-10 μs: this yields a limit on the maximal power electronic switching frequencies that can be accurately simulated using standard methods. This paper presents a design methodology for the hardware implementation of high-performance FPGA-based floating-point calculation engines aimed for the real-time simulation of power electronic systems. The power electronic circuits are modeled using the associated discrete circuit technique. A calculation time step of 100 ns is achieved for a boost converter, and the simulation results are validated against the SimPowerSystems library. The paper also discusses emerging paradigms for the FPGA-based floatingpoint computation that favor optimal performance and offer near double precision arithmetic at a minimal hardware cost.
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Publication date : Oct 2010
Paper File :
EPE-PEMC-2010-Opal-RT-FINAL.pdf
Authors
Minh C. Ta, Christian Dufour, Abstract
This paper presents real-time simulation results of a switched reluctance motor (SRM) drive with a novel Torque Distribution Function (TDF) for high-speed applications, in order to reduce torque ripple. The SRM is fed by a three-phase unidirectional power converter having three legs, each of which consist of two IGBTs and two freewheeling diodes. The SRM model incorporates all nonlinearities between excitation currents, rotor position and flux linkages. For the purpose of control SRM drives, an improvement of the TDF method is proposed for high-speed applications, in order to reduce torque ripple. The real-time simulation of the drive is conducted on the RT-LAB realtime simulation platform. Since the converter is currentcontrolled, simulator latency is critical to achieving good accuracy and avoiding current overshoot. The paper demonstrates that this type of drive with simple hysteretic current control can be simulated in real-time at a time-step of 15μs, with good accuracy. The paper also introduces FPGA-based simulation technology required to test advanced algorithms like TDF.
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