This example highlights the capacity of RT-LAB XSG to perform real-time simulation of complex plant models using FPGA technology. In particular, a permanent magnet synchronous motor (PMSM) is being simulated directly on an FPGA chip.
A 3-phase PMSM with sinusoidal flux distribution (Park model) and no saturation was implemented using the XSG blockset. Using Xilinx Foundation Tools, RT-LAB XSG automatically compiles and routes models onto an Opal-RT FPGA card.
Key advantages of RT-LAB XSG are:
- Easy Simulink integration and interface of FPGA designs (controllers, small machine models, PWM modulation units, etc.)
- Very fast computation of PMSM motor drive (e.g., latency of 250 ns), permitting very fast closed-loop testing of high-bandwidth motor controllers
- Very fast I/O with RT-LAB. D/A and A/D update rates of 1 μs and 2 μs respectively, and a digital I/O resolution of 10 ns.
The PMSM is driven at fixed rotor speed. The 3-phase, IGBT PWM inverter drives the stator with dead-time capability. The IGBT inverter gate signals can comes from external I/O or from an internal PWM source. In the latter case, the modulation signal is a 3-phase sinusoidal source with the exact rotor frequency but with a user-variable phase. The user can also modify the PWM carrier frequency of the modulator (up to 100kHz) as well as its dead time. Simulation with rotor-synchronous internal PWM source therefore results in constant Park d q quantities and electrical torque. By modifying the stator PWM voltage phase shift, one can observe and study its effect on the electrical torque. Similarly, by modifying the PWM dead time, one can observe the distortions on motor currents [8]. If external control is used, the machine phase currents also have fast D/A output with a 1μs conversion rate. The machine model itself has an input-output latency less than 250 ns (+ 60 ns for the inverter).
